Switzerland's Role in Open-Source RISC-V for Next-Gen Semiconductor Development
Switzerland is pivotal in the development of next-generation semiconductors, focusing on open-source Instruction Set Architecture (ISA) RISC-V. ETH Zurich has developed around 75 chips in the last decade, targeting niche areas like energy-efficient semiconductors. The country collaborates with global companies and academic institutions to innovate in chip design, essential for powering AI and data centers. The RISC-V ecosystem unites over 4,500 entities, fostering advancements in low-power computing and applications across various fields.
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Switzerland is central to the development of next-generation semiconductors, leveraging the open-source ISA RISC-V, established in 2010 at UC Berkeley. The ETH Zurich, a founding member of the RISC-V International Association, has developed approximately 75 chips over the past decade, focusing on energy-efficient designs for machine learning and inference.
The Swiss government founded CSEM in the 1980s to enhance collaboration between academia and industry, leading to significant advancements in semiconductor research. RISC-V unites over 4,500 institutions and companies like Google and Siemens, promoting innovation in chip design and low-power applications. CSEM and EPFL are actively engaged in projects targeting energy-efficient technology for various sectors.
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