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Experts from Siemens EDA, Marvell, and Astera Labs discussed the verification challenges in data centers, particularly between scaling up and scaling out architectures. Scale-up systems face verification complexities due to high port counts and memory semantics, whereas scale-out focuses on package integrity.

New interface standards like UCIe and UALink present unique verification hurdles, with UALink being supported by AMD as an open standard. The panel noted that while scale-up is less mature, scale-out is influenced by AI and requires dynamic load balancing protocols, complicating verification. They also highlighted the importance of security and system stability in high-bandwidth applications.