POSTECH and Samsung Electronics Advance 3D NAND Semiconductor Technology
POSTECH and Samsung Electronics have developed a method to enhance the performance of 3D NAND semiconductors by controlling crystal growth direction. This technology aims to improve data transport efficiency in high-layer memory architectures, crucial for next-generation applications.
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A new technology developed by POSTECH and Samsung Electronics enables better control of silicon crystal growth in 3D NAND channels, reducing resistance and enhancing data transport efficiency. The method, involving a seed layer and microwave annealing, allows for uniform crystal alignment in a 155-layer 3D NAND structure.
This advancement is significant for memory semiconductors, enabling faster and more reliable data processing. The research, supported by Samsung through an industry-academia joint project, was presented at the 2026 IEEE International VLSI Technology and Circuits Symposium and highlighted in 'Nature Electronics'. The ability to maintain performance in increasingly stacked memory structures poses potential risks if the technology does not scale effectively.
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